High-Performance Nanoribbon Transistors with Monolayer Transition Metal Dichalcogenide

Two-dimensional (2D) semiconductors are compelling candidates for gate-all-around (GAA) nanosheet transistors, owing to their atomic thinness that enables superior electrostatic gate control while maintaining adequate carrier mobilities. However, reducing the widths of 2D semiconductors below 100 nm has remained a challenge due to edge roughness effects. Here, we investigate the impact of width scaling across several monolayer 2D semiconductors. First, we study transfer length method structures of monolayer MoS₂ grown directly onto SiO₂ with doped Si global back-gates, demonstrating contact resistances <560 Ωꞏµm with standard Au contacts and no signs of mobility degradation down to 43 nm channel widths. Next, we fabricate n-type MoS₂, WS₂, and p-type WSe₂ monolayer structures on thin HfO₂ with local-back gates, with channel widths down to 50 nm. The current densities achieve up to 560, 420, and 130 µA/µm, respectively for each semiconductor, with 1 V drain-to-source voltage. Such excellent device performances are further substantiated by tip-enhanced photoluminescence mapping and direct visualization of the edges by transmission electron microscopy, revealing line-edge roughness of only 2-3 nm. These current densities are the best-to-date for single-gated monolayer 2D nanoribbon transistors, thus further solidifying the viability of top-down patterned 2D nanoribbons in future GAA architectures.