Quantum Error Correction with Superconducting Circuits

Quantum error correction (QEC) provides a path to bridge the gap between physical error rates and the extremely low logical error rates required for quantum computing applications. A scalable approach to fault-tolerant quantum computation must preserve quantum information in idling logical qubits with a manageable overhead and perform logical operations efficiently. Superconducting circuits provide a promising platform for addressing these challenges, but at the onset of this work, experimental demonstrations for topological codes were limited to error detection protocols or repetition codes, neither of which can continuously protect logical information against arbitrary errors.

In this talk, I present the body of work of my PhD thesis, in which I advance the state-of-the-art in topological QEC with superconducting circuits through three main contributions. First, I implement repeated quantum error correction using the surface code, a leading approach due to its high tolerance to errors. I show that errors caused by leakage—transitions to non-computational states— is a critical barrier to scalability. To address this, I introduce a universal leakage reduction unit (LRU) capable of suppressing leakage with high fidelity and minimal impact on computational states. I integrate the LRU in a distance-three surface code and demonstrate that it reduces errors with the key benefit of retaining all the data. Finally, I implement logical qubits using the color code, which enables more efficient logical operations than the surface code. I scale the code size and provide evidence that larger logical qubits have lower logical error rates, a critical requirement for scaling QEC. Additionally, I realize transversal single-qubit logical gates and multi-qubit logical operations via lattice surgery. Together, these contributions strengthen the evidence that large-scale quantum computation can be realized in practice using superconducting quantum processors.