A Heterogeneous Low-Latency Interconnect Enabling Large-Scale Qubit Control and Real-Time AI Inference
ORAL
Abstract
The rapid scaling of quantum processors to large qubit arrays creates a critical need for a low-latency link among multiple radio frequency system-on-chip (RFSoC) field-programmable gate arrays (FPGAs), as tasks like quantum error correction (QEC) demand coordinated control and computational resources that exceed the capacity of a single device. While the integration of real-time artificial intelligence (AI) offers a promising path for advanced control algorithms and efficient error decoding, it introduces the need for a high-bandwidth, low-latency communication fabric between heterogeneous computing platforms like FPGAs and graphics processing units (GPUs).
To address this challenge, we present the development of an open-source, low-latency data link designed for scalable quantum control systems. Our architecture facilitates the aggregation of multiple RFSoC FPGAs for the coherent control and measurement of large-scale qubit arrays. This system is tightly coupled with local GPUs, enabling real-time QEC decoders, and can interface with specialized AI Engine FPGA hardware for complex, high-dimensional model inference. This work provides a crucial, open-source infrastructure component that bridges the gap between traditional FPGA-based quantum control and emerging AI-accelerated techniques, paving the way for scalable and fault-tolerant quantum computation.
To address this challenge, we present the development of an open-source, low-latency data link designed for scalable quantum control systems. Our architecture facilitates the aggregation of multiple RFSoC FPGAs for the coherent control and measurement of large-scale qubit arrays. This system is tightly coupled with local GPUs, enabling real-time QEC decoders, and can interface with specialized AI Engine FPGA hardware for complex, high-dimensional model inference. This work provides a crucial, open-source infrastructure component that bridges the gap between traditional FPGA-based quantum control and emerging AI-accelerated techniques, paving the way for scalable and fault-tolerant quantum computation.
*The work was supported by the U.S. Department of Energy, Office of Science, Advanced Scientific Computing Research (ASCR) Quantum Testbed Program, the National Quantum Information Science Research Centers, Quantum Systems Accelerator (QSA), and the Office of High Energy Physics under Contract No. DE-AC02-05CH11231.
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Presenters
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Yilun Xu
- Lawrence Berkeley National Laboratory