Measurement of fluxons with a two-polarity detector
ORAL
Abstract
Reversible digital logic offers an energy efficiency advantage over traditional irreversible logic gates, and it has potential applications in astronomy detector readout and quantum information science. Among developing reversible logic types, Reversible Fluxon Logic (RFL) is unconventional because it relies on unpowered reversible flux soliton (fluxon) dynamics, which can operate faster than conventional metal oxide semiconductor logic and exploits ballistic and thermodynamically reversible principles. In RFL, information is encoded in the polarity of Single Flux Quantum (SFQ) pulses, with logical ‘1’ and ‘0’ represented by clockwise and counterclockwise electrical currents, respectively.
We present the design of a fundamental logic gate named Ballistic Flip-Flop (BFF), which is powered solely by the momentum of incoming fluxons. The BFF has symmetry permitting computation in either direction, but it is intended to be operated with other gates in a feed-forward architecture. In a test platform, the circuit consists of an inductive launcher, two Long Josephson Junctions (LJJs), an interface circuit with a 1-bit storage loop, and a two-polarity detector (TPD) that detects fluxons with either clockwise or counterclockwise polarity. The TPD design eliminates ground loops in the test platform that can interfere with gate testing, and allows an input signal bandwidth of ~1 GHz. To support gate initialization, we use controlled fluxon input via an LJJs and a SQUID, such that only up to one SFQ can be stored in the storage loop. We will present the operation of the two-polarity detector, and other results towards operating the BFF.
We present the design of a fundamental logic gate named Ballistic Flip-Flop (BFF), which is powered solely by the momentum of incoming fluxons. The BFF has symmetry permitting computation in either direction, but it is intended to be operated with other gates in a feed-forward architecture. In a test platform, the circuit consists of an inductive launcher, two Long Josephson Junctions (LJJs), an interface circuit with a 1-bit storage loop, and a two-polarity detector (TPD) that detects fluxons with either clockwise or counterclockwise polarity. The TPD design eliminates ground loops in the test platform that can interfere with gate testing, and allows an input signal bandwidth of ~1 GHz. To support gate initialization, we use controlled fluxon input via an LJJs and a SQUID, such that only up to one SFQ can be stored in the storage loop. We will present the operation of the two-polarity detector, and other results towards operating the BFF.
*The authors would like to thank MIT Lincoln Laboratory for the opportunity to fabricate our TPD chips using their foundry. We also thank Dr. Alexander Wynn for his valuable discussions and advice during chip design.
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Presenters
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han cai
- university of Maryland college park