Modeling circuit QED systems at Google - Part 2 of 2

Designing better quantum processors based on circuit QED technology relies on accurate and extensible numerical modeling. While gate parameters can be efficiently optimized for small 2d grids (Part 1), fidelity degrades in larger grids due to undesired interactions with other qubits. In this talk, we employ tensor network methods to perform large-scale optimization, directly accounting for these large-scale effects. This approach enables high-performance optimization of two-qubit gates in a larger grid, including the effect of crosstalk during simultaneous operations. The result is a process that accelerates the hardware design-test cycle.