Encoded random access quantum memories (Part 1/2)

Random Access Memories (RAM) are indispensable to classical computing but remain notably absent in superconducting qubit architectures. Achieving scalable quantum computation requires dedicated, integrated quantum memory to work in parallel with a quantum error-corrected processor. We present an integrated architecture [1] that combines processors with quantum memories, of which we experimentally realized a unit cell for superconducting qubits [2]. In this design, each data qubit is equipped with a memory array (a vertical column of memory slots). Conversely, each logical qubit is stored in memories with the same index gathered across all data qubits (a horizontal row of memory slots).

This architecture achieves a multifold expansion of logical qubit capacity while using only the control resources of a single logical qubit. Crucially, the design provides random access and all-to-all coupling, offering a resource-efficient pathway—transversal gates—to implement two-logical-qubit gates in superconducting qubits. We show that while finite coherence bounds the physical memory size, the architecture still yields a significant control advantage for practical systems. 

[1] Duckering et al. IEEE/ACM Int. Symp. MICRO (2020); [2] Li, Gupta et al. arXiv:2503.13953