Single electron transistors made using a single, varying-width gate

A single electron transistor (SET) is demonstrated in silicon MOS using a single gate with variations in width to create reservoir, barrier and dot regions beneath it. Since the effective threshold voltage depends strongly on the gate width for sizes below the depletion width, an operating voltage can be selected where narrow regions of the gate do not invert, creating tunnel barriers, and wider regions do invert. Using a series of 10 μm long nano-wire transistors (NWTs) ranging from 30 nm to 1000 nm in width, we show that the threshold voltage variation spans >0.5 V for both Ti/Al and Ti/Pd gates in this range. These data are then applied to form bubble gate transistors (BGTs) with 150 nm “bubble,” used to form the quantum dot of an SET, and connected to reservoirs by 50 nm segments that form tunnel barriers. Transfer curves and Coulomb diamonds for these devices will be shown.