Design and fabrication of a merged element transmon with a phononic bandgap shield – Part 2
ORAL
Abstract
Lossy two-level systems (TLSs) originating in amorphous surface layers and material interfaces represent one of the dominant decay and decoherence mechanisms in superconducting qubits. By incorporating a phononic bandap shield around the junction of a transmon qubit, one can mitigate the dominant decay channel for TLS interacting with the local qubit field. Further, by concentrating the energy of a transmon qubit to a small volume around the junction while ensuring the corresponding TLS spectral density can remain in a discrete limit, then one can realize distinct frequency windows in which the TLS-mediated qubit energy decay can be suppressed.
Past work by Chen et al. [1] has shown that the shielding technique is highly effective in suppressing the energy decay of TLS localized to the Josephson junction, resulting in TLS T1 times over a few milliseconds. In this second part of a two-part talk, we describe the progress we have made in optimizing the fabrication of a merged element transmon (mergemon) and readout resonator circuit where parasitic capacitance beyond the shielded region is three-orders of magnitude less than the shielded junction capacitance. Specifically, we will describe the fabrication of a special junction geometry with minimized parasitic capacitance in the junction leads, a nanoscale capacitor for coupling to the readout circuit, and an acoustic shield that hosts both the junction and coupler.
[1] M. Chen et al., Sci. Adv. 10, eado6240, (2024), doi:10.1126/sciadv.ado6240.
Past work by Chen et al. [1] has shown that the shielding technique is highly effective in suppressing the energy decay of TLS localized to the Josephson junction, resulting in TLS T1 times over a few milliseconds. In this second part of a two-part talk, we describe the progress we have made in optimizing the fabrication of a merged element transmon (mergemon) and readout resonator circuit where parasitic capacitance beyond the shielded region is three-orders of magnitude less than the shielded junction capacitance. Specifically, we will describe the fabrication of a special junction geometry with minimized parasitic capacitance in the junction leads, a nanoscale capacitor for coupling to the readout circuit, and an acoustic shield that hosts both the junction and coupler.
[1] M. Chen et al., Sci. Adv. 10, eado6240, (2024), doi:10.1126/sciadv.ado6240.
*This work was supported by Amazon Web Services (AWS).
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Presenters
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Christopher Freestone
- Caltech