CryoCMOS from 4 K to millikelvin temperatures for quantum computing
ORAL
Abstract
Scaling quantum computers to millions of qubits remains a major challenge. Cryogenic CMOS (cryoCMOS) technology offers a promising route to improve scalability by reducing the number of DC and RF cables between room temperature and cryogenic stages, lowering latency, and mitigating the rapidly increasing power demands of control electronics at scale [1]. Several demonstrations have shown cryoCMOS control electronics for quantum computing operating at 4 K; however, extensive cryogenic hardware is still required to interface with quantum devices at millikelvin temperatures, which prevents aggressive scaling. In this talk, I will present imec’s latest activities on cryoCMOS, from device fundamentals and technology optimization to applications targeting operations down to millikelvin temperatures.
*This work is supported in part by the imec Industrial Affiliation Program on Quantum Computing. This work is also supported by the Chips JU project ARCTIC (Project #101139908). The project is supported by the Chips Joint Undertaking and its members (including top-up funding by Belgium, Austria, Germany, Estonia, Finland, France, Ireland, The Netherlands and Sweden). ARCTIC gratefully acknowledges the support of the Canadian and the Swiss federal governments.
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Publication: [1] Potocnik et al., Nat. Electron. 8, 3 (2025).
Presenters
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Anton Potocnik
- IMEC
- imec