Logical Randomized Benchmarking a Qutrit Surface Code

In recent years, engineers have worked towards creating qutrit computers in order to study problems in quantum simulation, error correction, and communication. We are interested in numerically characterizing a 5-qutrit chip protected by a [[5,1,2]]_3 error detection code against a single physical qutrit system. Such a system is typical of an early FTQC machine and is potentially rich in applications. We use Sdim, an open source qudit stabilizer simulator, to perform a modified Logical Randomized Benchmarking (LRB) protocol. Our modification, called LRB-D, only postselects shots for which the protocol detects the state is a valid codeword on a small subset of the steps. Prior literature has employed randomized benchmarking (RB) as an industry-standard error characterization tool, and more recent efforts have supported LRB as similarly useful for code characterization, but none have studied LRB-D, whose weaker detection property may be preferable in a setting with (surface) codes over only a few physical qudits. When performing LRB-D with just a single terminal detection event, we observe signatures of highly non-Markovian logical errors. However, by postselecting in frequent, regular intervals, we recover a Markovian noise process, up to certain error parameters in the noise model, allowing us to meaningfully characterize our logical Clifford gates. Furthermore, up to an error parameter or circuit depth, we display a greater fidelity for the encoded gate set compared to its physical counterpart. This work will be of great interest to groups developing small qudit systems who wish to benchmark their corresponding logical capabilities, as well as code designers studying how to fight error in settings more appropriate for detection.