Designing Minimalist Superconductor Circuits: Logic, Interconnects, and Memory
ORAL · Invited
Abstract
Superconductor electronics have long been considered a potential competitor or complement to silicon technologies, dating back to the cryotron era in the 1950s. Nevertheless, the promise has remained largely unrealized---partly because silicon reached economies of scale first and partly because superconductor circuits have yet to fully capitalize on the opportunities intrinsic to their physics. The latter will be the focus of this talk, marking a deliberate departure from mimicking the silicon status quo. Specifically, we argue for: (1) a minimal, fabrication-friendly logic set; (2) redesigned interconnect interfaces that lower Josephson-junction overhead; and (3) delay-line memories based on passive transmission lines, leveraging kinetic inductance instead of contending with geometric-inductance limits. We will present simulation data and initial experimental results demonstrating the feasibility of this approach with Single Flux Quantum (SFQ)-based circuits and highlight architectural opportunities that emerge when superconductor circuits are designed to "listen to the technology."
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Publication:Volk, Jennifer, Tzimpragos, Georgios, and Mukhanov, Oleg. "xesfq: Clockless sfq logic with zero static power." (2025). (Planned)
Vanasse, Alex, Tzimpragos, Georgios, and Volk, Jennifer. "SFQ Amplifier for Fanout and Interconnects in Superconductor Electronics." (2025). (Planned)
Volk, Jennifer, et al. "Synthesis of resource-efficient superconducting circuits with clock-free alternating logic." Proceedings of the 61st ACM/IEEE Design Automation Conference. 2024.
Volk, Jennifer, et al. "Addressable superconductor integrated circuit memory from delay lines." Scientific Reports 13.1 (2023): 16639.
Tzimpragos, Georgios, et al. "Superconducting computing with alternating logic elements." 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA). IEEE, 2021.