Eliminating surface oxides of superconducting circuits with Damascene fabrication

The lifetime of superconducting qubits is limited by dielectric loss, and a major source of dielectric loss is the native oxide present at the surface of the superconducting metal. Specifically, tantalum-based superconducting qubits have been demonstrated with record lifetimes in the millisecond regime, but a major source of the remaining loss is the presence of two-level systems in the surface tantalum oxide, especially in the sidewalls of the device. One approach to eliminating surface oxides is to fabricate buried metal traces, where the metal-air interface is replaced with metal-dielectric substrate interfaces. Here, we demonstrate tantalum superconducting resonators fabricated via a Damascene method, in which the tantalum sidewalls are encapsulated by the silicon substrate. This fabrication process suppresses surface oxide formation, and moreover, it establishes techniques for fabricating superconducting circuits using planarization methods commonly deployed in large-scale semiconductor foundries.