Automated Design, Compilation, and Performance Benchmarking for Fault-Tolerant Quantum Computer Architectures Using TopQAD

Achieving fault-tolerant quantum computation (FTQC) at utility scale will require millions of physical qubits. The large overheads associated with quantum error correction and FTQC protocols pose tremendous engineering challenges. Resource estimation and performance benchmarking are critical steps toward achieving the relevant engineering goals. Accurate assessments of resource requirements necessitate the design of quantum architectures which dictate how a given quantum algorithm will be implemented on noisy and faulty quantum processors. Such assessments are necessary in evaluating trade-offs throughout the quantum computing stack and guiding architecture design choices and hardware fabrication targets towards utility scale.

We present TopQAD, a comprehensive framework and software suite for automated topological quantum architecture design [1] that enables analyzing impacts of quantum algorithm and FTQC component design choices on resource requirements. Its capabilities include automated quantum circuit compilation from an intermediate representation down to multi-qubit lattice surgery schedules to be implemented in a core processor [2] and automated optimization of multi-level magic state factories [3]; its noise profiling tools allow quantum hardware benchmarking [4]. We quantitatively demonstrate the impacts of various sources of noise, and how quantum hardware improvements affect FTQC architecture efficiency.