From Compiler to Device: Resource Estimates and Crossover Targets for Utility-Scale HRQAOA

We present a cross-layer resource analysis of Hyper-Recursive QAOA (HRQAOA) aimed at practical, utility-scale execution. First, we benchmark state-of-the-art classical optimizers and mark the instance sizes where their runtime and cost rise sharply. We then introduce a stack of software-compiler techniques for HRQAOA -- depth compression, topology-aware routing, sampling/shot planning, parameter-transfer heuristics, and lightweight error-handling -- to lower implementation cost without changing the learning objective. These optimizations are translated into platform-specific resource estimates for neutral-atom and superconducting processors (qubits, two-qubit depth, fidelity, repetition rate, and shot budgets). From these data we derive hardware-algorithm crossover regions where the hybrid approach is expected to outperform purely classical methods on time or cost while preserving task quality. As a representative workload, we use graph-correlated feature selection derived from cancer biomarker datasets; the application serves only as a case study to ground the analysis. The contribution is a co-designed, compiler-to-device methodology that links algorithm choices to architecture requirements and provides clear milestones -- on fidelity, rate, and scale -- for near-term and future systems. This roadmap aligns hardware development with algorithmic progress and clarifies when HRQAOA can reach empirical quantum advantage.