Subtractive Window Process for Scalable Fabrication of Josephson Junctions

Modern semiconductor industry has demonstrated an unparalleled capability to scale to large

architectures with device failure rates on the order of parts per billion. At the same time

superconducting qubits are fabricated using additive processes for Josephson junctions, which are

incompatible with industrial manufacturing and can leave residues that are detrimental to the

qubit performance[1,2].

Here we present a subtractive window junction process for Josephson junctions as well as

preliminary data on room temperature resistance and qubit performance. This process is being

developed in collaboration with the semiconductor industry and designed to be compatible with

manufacturing on 300 mm scale. Together with state-of-the-art industrial metrology tools, this

represents a viable path for scaling superconducting quantum information systems with a high

degree of uniformity and reduced fraction of poor-performing qubits.

[1] Weeden et al, Statistics of Strongly Coupled Defects in Superconducting Qubits,

arXiv:2506.00193 [quant-ph] (2025)

[2] Mohseni et al, How to Build a Quantum Supercomputer: Scaling from Hundreds to Millions of

Qubits, arXiv:2411.10406 [quant-ph] (2025)