Resist-Free Stencil Deposition for Low-Loss Superconducting Circuits and Qubits (Part 1)

ORAL

Abstract

Conventional liftoff techniques using organic resists are widely employed for Josephson-junction fabrication, but they can degrade metal quality and leave behind residues that are believed to limit qubit coherence. To investigate the impact of resist-based fabrication on superconducting circuits, we developed a resist-free process using a silicon nitride stencil mask, enabling wafer-scale junction deposition without organic resists.



In the first part of this two-part talk, we present our fabrication method of the silicon nitride stencil mask and its integration into wafer-scale deposition. We describe the design of the resonators used for comparing the loss between stencil-deposited and liftoff metals, and we present corresponding material characterization and measurement results.

*This research is sponsored in part by the U.S. Army Research Office under Award No. W911NFF-23-1-0045 and in part by the U.S. Department of Energy, Office of Science, National Quantum Information Science Research Centers, Co-design Center for Quantum Advantage (C2QA) under contract number DE-SC0012704. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the U.S. Government.

Presenters

  • Hung-Yu Tsao

    • Massachusetts Institute of Technology

Authors

  • Hung-Yu Tsao

    • Massachusetts Institute of Technology
  • Chia-Chin Tsai

    • Massachusetts Institute of Technology
  • Aranya Goswami

    • Massachusetts Institute of Technology
    • Nokia Bell Labs
  • Farid Hassani Bijarbooneh

    • Massachusetts Institute of Technology
  • Max Hays

    • Massachusetts Institute of Technology
  • Jeffrey A Grover

    • Massachusetts Institute of Technology
  • William D Oliver

    • Massachusetts Institute of Technology