Resist-Free Stencil Deposition for Low-Loss Superconducting Circuits and Qubits (Part 2)
ORAL
Abstract
Conventional liftoff techniques using organic resists are widely employed for Josephson-junction fabrication, but they can degrade metal quality and leave behind residues that are believed to limit qubit coherence. To investigate the impact of resist-based fabrication on superconducting circuits, we developed a resist-free process using a silicon nitride stencil mask, enabling wafer-scale junction deposition without organic resists. In the second part of this two-part talk, we first describe our transmon designs with varying capacitor gaps to modulate the participation ratio of the junction metals. Using this baseline design, we then compare the loss mechanisms and coherence times of transmon qubits fabricated via stencil-based and traditional lift-off methods.
*This research is sponsored in part by the U.S. Army Research Office under Award No. W911NFF-23-1-0045 and in part by the U.S. Department of Energy, Office of Science, National Quantum Information Science Research Centers, Co-design Center for Quantum Advantage (C2QA) under contract number DE-SC0012704. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the U.S. Government.
–
Presenters
-
Chia-Chin Tsai
- Massachusetts Institute of Technology