Metal-Substrate Interface Probing for High-Coherence Super-Semi Devices

Superconducting microwave circuits on compound III–V semiconductors are an exciting platform for gate-tunable mesoscopic devices, yet coherence remains limited by dielectric loss, particularly from microwave two-level systems (TLS).  TLS loss predominantly comes from three regions: (1) the air-metal interface, (2) the metal-substrate interface, and (3) the substrate-air interface. After two decades of work, we understand the contributions of these interfaces to loss in silicon and sapphire-based platforms. However, more recent gate-tunable devices/circuits are built on III-V compound semiconductor substrates, therefore requiring new efforts in probing the losses present at the metal-substrate interface within these systems. In this work, we will discuss new experiments probing dielectric losses at the metal-III/V interface using a prototypical system of Nb/InP (001). Nb is chosen in this case as a highly promising candidate for high temperature Josephson junction devices. We study the complex Nb–In–P interfacial region by comparing superconducting resonator circuits fabricated on InP substrates with and without an in-situ argon milling step: one preparation is milled prior to metal deposition, while the other retains its native oxide. A comparison study of superconducting coplanar waveguide resonator internal quality factors is presented, where, surprisingly, uncleaned surfaces provide superior internal quality factors.