Superconducting Qubit Gate Design Tailored for Quantum Error Correction
ORAL · Invited
Abstract
Quantum error correction (QEC) is one of the crucial building blocks for developing quantum computers that have significant potential for reaching a quantum advantage in applications. Prominent candidates for QEC are stabilizer codes for which periodic readout of stabilizer operators is typically implemented via successive two-qubit entangling gates and is repeated many times during a computation. Implementing such protocols imposes specific requirements on the underlying hardware. To improve QEC protocols, the physical qubits and the gates should be tailored to the needs of the QEC algorithm itself. In our work, we design superconducting circuit hardware and gate operations that are specifically optimized for QEC, focusing on understanding and reducing uncorrectable errors that limit fault-tolerant performance. By analyzing the dominant error mechanisms and refining gate implementations accordingly, we aim to realize hardware that is intrinsically aligned with the requirements of quantum error correction.
*This research is part of the Munich Quantum Valley (K-8), which is supported by the Bavarian state government with funds from the Hightech Agenda Bayern Plus. We additionally acknowledge support by the BMBF projects GeQCoS (Grant No. 13N15684) and MUNIQC-ATOMS (Grant No. 13N16070). Furthermore, J.O. and M.M. acknowledge support by the European Union's Horizon Europe research and innovation programme under Grant Agreement No. 101114305 ("MILLENION-SGA1" EU Project) and by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation) under Germany's Excellence Strategy "Cluster of Excellence Matter and Light for Quantum Computing (ML4Q) EXC 2004/1" 390534769 and the ERC Starting Grant QNets through Grant No. 804247. The authors gratefully acknowledge the computing time provided to them at the NHR Center NHR4CES at RWTH Aachen University (Project No. p0020074). This is funded by the Federal Ministry of Education and Research and the state governments participating on the basis of the resolutions of the GWK for national high performance computing at universities.
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Publication:Preprint: Optimizing Superconducting Three-Qubit Gates for Surface-Code Error Correction, https://doi.org/10.48550/arXiv.2506.09028
