High Mobility Palladium Diselenide (PdSe₂) Field Effect Transistors Using heavily n-doped Graphene Contacts

Two dimensional materials comprised of puckered pentagonal layers could enable a variety of optoelectronic, piezoelectronic, spintronic, and valleytronic applications due to the low symmetry of the lattice structure. PdSe₂ is one such material of particular interest because of its high electron mobility and excellent chemical stability. However, in spite of its relatively small bandgap, the performance of few-layer PdSe₂ field-effect transistors (FETs) has been largely limited by the presence of a substantial Schottky barrier, which is likely due to Fermi-leveling pinning. In this work, we report the fabrication of high mobility n-type PdSe₂ FETs with hexagonal boron nitride passivated channels and graphene contacts. We achieve a typical room temperature field-effect mobility of ~ 140 cm² V^-1 s^-1 in few-layer PdSe₂ FETs, which increases to ~500 cm² V^-1 s^-1 at 77 K. The low-temperature mobility is further improved by heavily n-doping the graphene contacts.