Superconducting solder bumping technology for scalable quantum annealing machines
ORAL
Abstract
Three-dimensional packaging of superconducting quantum bits is one of the most important technologies for large scale quantum annealing machines. In this work, we are focusing on how to make hundreds of thousands levels of DC connections reliably. Therefore, some properties of the superconducting bumps for flip-chip bonding consisting of a large number of bumps were investigated in details. Superconducting solder bumping test chips were designed for QUIP (Qubit-chip, Interposer and Package-substrate). The test devices consist of a 7.5 mm-square top chip and an 8.5 mm-square base chip. Nb/Ti/Au contact pads for placing were fabricated on Si substrates. To obtain electrical properties of a large number of interconnects, we design and fabricate about 10000 circular lead solder bumps with a 10 um diameter on the top chip and Nb/Ti/Au-opposing-contact pads on the base chip to form a daisy chain of about 10000 chip-to-chip interconnects. We chose lead as the solder material because it has a relatively high critical temperature of 7.2 K and we can check superconducting connection using liquid He and/or conventional refrigerators.
–
Presenters
-
Kazumasa Makise
National Institute of Advanced Industrial Science and Technology (AIST)
Authors
-
Kazumasa Makise
National Institute of Advanced Industrial Science and Technology (AIST)
-
Masaaki Maezawa
National Institute of Advanced Industrial Science and Technology (AIST)
-
Mutsuo Hidaka
National Institute of Advanced Industrial Science and Technology (AIST)
-
Hiroshi Nakagawa
National Institute of Advanced Industrial Science and Technology (AIST)
-
Katsuya Kikuchi
National Institute of Advanced Industrial Science and Technology (AIST)