Quantifying the impact of a caps and vias architecture for superconducting qubits

Scaling high-fidelity superconducting quantum processors to hundreds of qubits requires low on-chip crosstalk at both DC and microwave frequencies, control of the microwave environment seen by each qubit, and accurate coupling strengths between specific modes. To enable this, we describe a chip architecture that combines superconducting caps with recessed cavities bump bonded to a quantum IC with superconducting vias. We describe measurements showing the impact of both caps and vias across a 16+ qubits, including data that enable us to separate out the effects of caps, vias, and the placement of the cap indium bumps on device crosstalk.