Efficient Routing and Interconnects for Superconducting Qubits

As superconducting qubit performance continues to improve in single- and few- qubit demonstrations, we must also address the challenge of interconnects for superconducting quantum processors in order to reap the benefits of these advances. The interconnect challenge arises from the stringent engineering requirements necessary to route signals from room-temperature control hardware through five orders of magnitude in temperature change, into cryogenic packaging, and onto the quantum processor itself. This routing must preserve signal fidelity, maintain thermal isolation, reduce signals crosstalk, and must be done in a way that enables maintaining the highest performance in the quantum systems themselves. This talk will review our recent work in addressing these challenges at the levels of quantum hardware, packaging input/output, and cabling.