Through-Silicon Vias (TSVs) for High-Coherence Superconducting Qubit Devices

Densely packed arrays of superconducting qubits, each requiring multiple control and readout lines, encounter routing congestion in planar architectures. While high-coherence qubits have been demonstrated alongside air bridges and in flip-chip fabrication, much work remains to be done to establish the same for superconducting through-silicon vias (TSVs). TSVs are used widely in high-density classical microelectronic systems and present a similarly promising route toward 3D-integrated, multi-stack superconducting devices and packaging.

In this work, we target high-aspect-ratio TSVs of varying geometries at the wafer-scale and integrate them with a superconducting process. We investigate the parameters that determine the performance of superconducting TSV devices. We also examine compatibility with our flip-chip process to enable vertically stacked dies for complex signal routing.