Flip-Chip Architecture with Metallized Silicon Posts for Superconducting Qubit Integration
Oral-In-person
Abstract
State-of-the-art superconducting qubit arrays rely on multiple microwave links per qubit for control, readout, and coupling. Scaling the number of such qubits quickly faces issues such as overcrowding of the connecting circuitry. A flip-chip architecture featuring uniform chip interspacing and galvanic interconnects provides a foundation for integration of superconducting qubits.
In this work, we present a flip-chip architecture featuring metallized silicon posts. We show a fabrication technique that enables lithography of microwave lines on silicon posts, allowing for direct routing of signal lines to the top chip. The gap between the chips (>10 µm) is accurately controlled by the silicon pillars, providing an environment with fixed effective permittivity across the chip for accurate frequency targeting. Finally, we show and discuss qubit coherence times measured in this flip-chip architecture.
In this work, we present a flip-chip architecture featuring metallized silicon posts. We show a fabrication technique that enables lithography of microwave lines on silicon posts, allowing for direct routing of signal lines to the top chip. The gap between the chips (>10 µm) is accurately controlled by the silicon pillars, providing an environment with fixed effective permittivity across the chip for accurate frequency targeting. Finally, we show and discuss qubit coherence times measured in this flip-chip architecture.
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Presenters
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Farid Hassani Bijarbooneh
- Massachusetts Institute of Technology