Compact qubits on thin membrane for large-scale quantum computing architectures
Oral-In-person
Abstract
Significant progress has been made toward developing utility-scale quantum computers, but major challenges remain. Qubits—the quantum counterparts of classical bits—are far more delicate and prone to errors caused by noise and energy decay. Recent error-mitigation approaches rely on redundancy, increasing the number of qubits in a system to correct errors through quantum error correction. However, this approach requires a large number of interconnected qubits, making it technically demanding to build and maintain stable large-scale quantum systems.
We propose a new transmon qubit design fabricated on a thin single-crystal dielectric membrane. One side of the membrane is metallized with a thin-film superconductor, while the opposite side features two capacitor pads connected by a Josephson junction. This design significantly reduces the qubit’s size—allowing thousands of devices to be integrated on a single chip—while minimizing parasitic coupling between qubits, improving thermalization through additional normal-metal coating on the ground plane, and substantially decreasing the likelihood of correlated errors from high-energy radiation.
We propose a new transmon qubit design fabricated on a thin single-crystal dielectric membrane. One side of the membrane is metallized with a thin-film superconductor, while the opposite side features two capacitor pads connected by a Josephson junction. This design significantly reduces the qubit’s size—allowing thousands of devices to be integrated on a single chip—while minimizing parasitic coupling between qubits, improving thermalization through additional normal-metal coating on the ground plane, and substantially decreasing the likelihood of correlated errors from high-energy radiation.
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Publication: Patent application number 63/844,903
Presenters
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Ivan Nekrashevich
- Fermi National Accelerator Laboratory (Fermilab)