Resist-free Josephson junction fabrication

Shadow-evaporated Josephson junctions continue to exhibit the state-of-the-art performance in superconducting qubit applications. However, the typical use of fragile polymer resists on the substrate at the time of evaporation results in increased contaminations, liftoff challenges leading to fabrication defects, and limitations of materials choices. The resist bilayer is also relatively incompatible with scalable CMOS technology. Here, we demonstrate a novel technique to shadow evaporate Josephson junctions with no resist on the silicon substrate during evaporation. The scheme allows for improved substrate preparation prior to evaporation, as well as a larger variety of available materials for electrodes and oxides. We compare the performance of various electrodes and oxides to show the versatile nature of the fabrication technique. The technique expands the space for materials exploration in Josephson junction fabrication, and reduces the potential for loss due to residues and contamination.