Multiplexed characterisation and automatic tune-up of 45 SEB + DQD unit cells in Si MOS for device process control

As arrays of spin qubits based on quantum dots (QDs) continue to scale, a detailed understanding of how device parameters vary across arrays is required to accurately design large quantum processors. Such efforts are needed to produce a quantum equivalent to the classical process design kit in the various QD manufacturing platforms being established. QD characterisation at scale has gained increasing attention in the field by making use of cryo-wafer probers (Si/SiGe), as well as cryogenic time-domain multiplexing (Si FDSOI) and device matrix arrays using shared control (Ge).

In this work, we present a quantum device matrix array (QDMA), fabricated in a 300mm Si MOS, and consisting of many unit cells of a single electron box (SEB) + double quantum dot (DQD). The array is controlled using a combination of on- and off-chip multiplexing and shared control lines. We use this platform for device process control, compare dot parameters across different QD dimensions, and to develop auto-tuning routines. These routines are both necessary for characterisation of the array and for the initialisation of larger quantum processors.

We make use of automated tune-up routines designed to minimise the required measurements needed to tune-up the sensor dot and DQD electron occupation of the device. We characterise the QDs in terms of their lever arm matrix, addition energies, tunnel rates and couplings and compare the measurements with simulations of the unit cells.