QLDPC codes for superconducting hardware

This talk introduces novel ways of implementing the recently introduced tile codes on superconducting hardware. Tile codes are qLDPC codes with parameters promising resource savings of more than 8x compared to the usual surface code by relaxing the locality constraint of the surface code slightly. Using novel hardware components, we explain a clear path forward for implementing tile codes on superconducting hardware, including QEC cycle scheduling and simulation results under circuit-level noise. This talk presents a first-of-its-kind demonstration that qLDPC codes on superconducting hardware are feasible.