Placing and routing quantum LDPC codes in multilayer superconducting hardware
ORAL
Abstract
Recent work has shown that quantum error correcting codes with nonlocal connectivity may significantly reduce the qubit overhead required to reach algorithmically relevant logical error rates. In this talk, we report on our efforts toward performing low-overhead quantum computation in a small-scale qLDPC code using superconducting qubits. Our code encodes three logical qubits at distance-two with only six data qubits. We realize the geometrically nonlocal connectivity of the X, Y, and Z stabilizers with transmission-line-cavity-based long-range couplers. We discuss the implications of operating three logical qubits within one code block and present schemes for hardware-tailored fault-tolerant logic. These results, combined with discussions on how our techniques extend to larger code architectures, demonstrate the potential for lowering overheads in fault-tolerant quantum computation with superconducting qubits.
*This research was sponsored in part by IARPA and the Army Research Office, under the Entangled Logical Qubits program, and was accomplished under Cooperative Agreement Number W911NF-23-2-0212; in part by, the U. S. Army Research Laboratory and the U. S. Army Research Office under contract number W911NF2310255; in part by the U.S. Army Research Office under contract number W911NF-18-1-0218; and in part under Air Force Contract No. FA8702-15-D-0001. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the U.S. Government.
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Presenters
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Lukas Pahl
- Massachusetts Institute of Technology